FPGA-latest news from Kevin Morris
a techfocus media publication :: March 2, 2010
From the Editor
kevin_small.jpg
This is an exciting week as we have yet another long-awaited FPGA player making their first public disclosures. Tabula - long in stealth mode, has just announced a radical new architecture called "Spacetime" for their upcoming 3D FPGA families. What's a 3D FPGA and what does "Spacetime" mean? You'll have to read our latest feature, of course.
Also new this week - we had a lot of skepticism about our previous article (click here) on the viability of differential power analysis (DPA) attacks on FPGA security. We decided to visit the labs of Cryptography Research, Inc. to see the process for ourselves. We documented our observations in Journal Forums (click here).
You may have noticed a reward for the best, most insightful forum posts. We're giving another away for the best posts in March, so get started posting.
Kevin Morris, Editor
FPGA Journal
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On Demand
Lowering The Total Cost of Ownership for Industrial Applications (WHITE PAPER)
Approximately one-third of embedded designers surveyed on the adoption and use of FPGAs for embedded applications responded that they perceived FPGAs as too expensive to use in their designs. However, a look at the total cost of ownership (TCO) at the system level (as measured by development, enhancement, replacement, and maintenance costs over the lifetime of the product) reveals that Altera FPGAs offer competitive and flexible alternatives to discrete MCU/DSP/ASSP products. (Altera)
Support Multiple Industrial Ethernet Protocols With a Single FPGA (VIDEO)
Need to support multiple Industrial Ethernet protocols in your factory or process automation system? This 10-minute video features three demos integrating motor control and Industrial Ethernet into a single FPGA. You'll learn how you can easily change protocols on the same FPGA platform and add any Industrial Ethernet communication to existing industrial equipment. (Altera)
Intelligent Digital Power Management (WHITE PAPER)
Today’s complex system designs require capable and efficient power management to enable the advanced features customers demand. Intelligent power management is essential in fulfilling green initiatives and minimizing power consumption. Actel offers an intelligent digital power management (IDPM) solution that provides high-level power management in a low-power, configurable, single-chip design. (Actel)
Accelerating System Designs Requiring High-Bandwidth Connectivity with Targeted Reference Designs (WHITE PAPER)
FPGAs that provide multi-gigabit serial transceivers to implement high-speed serial protocols have become the platform of choice for a large and growing number of applications today. The flexibility to accommodate different protocols, line rates, and emerging standards has made the multi-gigabit serial transceiver the perfect companion to the flexible reprogrammable logic in FPGAs. However, this flexibility comes at a cost. Designing systems that incorporate high-speed serial I/O is difficult enough. Designing systems that work with multiple protocols and different line rates is even more challenging. (Xilinx)
Simplifying Embedded Hardware and Software Development with Targeted Reference Designs (WHITE PAPER)
FPGAs are becoming the platform of choice for a growing number of hardware and software designers developing embedded processing applications for the industrial, medical, communications, aerospace, and defense markets. The combined value of design flexibility to support changing standards, reduced cost due to better system integration, and parallel processing performance has steadily fueled this trend of implementing complete systems on FPGAs. (Xilinx)
Simplifying Multi-Rail Power Management for FPGA designers (CHALK TALK)
Designing a multi-rail power subsystem? Make it easy, and protect expensive ICs, such as FPGAs. Complex designs call for powerful and sophisticated solutions without compromising ease and speed of design. Join Amelia Dalton as she talks with Dave Clemens of Linear Technology about how you can easily set up all-in-one supervising, sequencing, controlling and monitoring of multiple power supplies. (Linear Technology)
Lowering Total System Power Using Xilinx FPGAs (CHALK TALK)
In this webcast, Chalk Talk host Amelia Dalton talks with Jameel Hussein of Xilinx about optimizing system-level power with FPGAs, and features and tools that simplify low-power design with Xilinx FPGAs. (Xilinx)
Platform Management Using MachXO & ProcessorPM PLDs (Webcast)
PLDs are commonly used in platform management applications for housekeeping and power-up management. In this webcast, we discuss the requirements of PLDs in this scenario and look at some of the advantages of the MachXO and ProcessorPM devices from Lattice. We will also examine some of the convenient tools that Lattice provides for quick evaluation and experimentation of the MachXO and ProcessorPM PLDs. (Lattice)
Pushing The Envelope in FPGA Design Using PlanAhead (CHALK TALK)
Want to have the best FPGA designs on the block? You have to push the technology to stay competitive. Join Amelia Dalton as she talks with Greg Daughtry of Xilinx in this Chalk Talk about pushing the envelope in FPGA design. (Xilinx)
Latest News
March 02, 2010
Actel Releases Comprehensive Development Environment and Ecosystem for SmartFusion Intelligent Mixed Signal FPGAs
Actel Introduces SmartFusion Devices -- FPGAs with ARM Cortex-M3 Processor and Programmable Analog
Xilinx Expands Market-Leading Automotive Silicon Portfolio With Spartan-6 FPGAs Optimized to Reduce System Cost
I2C Battery Gas Gauges for Single Li-Ion Cells Offers 1% Accuracy
Xilinx and Inova Semiconductors Simplify Design Integration of High-Bandwidth Video Connections for Automotive Applications
March 01, 2010
Real-Time Filter Design System
February 26, 2010
Eutecus, Inc Releases New Video Analytics Module – the Bi-i V401X, with all analytics embedded in a single low-cost FPGA – and Evaluation and Development Environment also announced at Embedded World 2010
STMicroelectronics Introduces SPEAr® Microprocessors for Embedded-Control Applications
February 25, 2010
European SystemC User Group (ESCUG) Meeting DATE 2010
Lattice Inaugurates Asia Operations Center In Singapore
February 24, 2010
Dual Positive/Negative ±20VIN ±150mA LDO Offers 20µVRMS Noise
Current Feature Articles
The Spacetime Continuum
Tabula Explains 3D FPGAs
by Kevin Morris
Don't try to understand how Tabula's 3D FPGA fabric works. You don't need to know that. All you have to do is wait until they announce a family based on the new technology, and then you can buy bigger, faster FPGAs for less money. And, yes, you can keep using your standard HDL-based FPGA design methodology.
That's it.
We're done.
You can stop reading now.
Why are you still here? Do you think we're going to explain what "spacetime" means, and how an FPGA could possibly be 3D? Are you expecting to hear about logic cells being resource-shared and time-multiplexed at super-high frequencies, creating a virtual logic fabric with up to eight times the density of the physical silicon?
Nah. Read More
20100223_cards Cards on the Table
Xilinx Announces 28nm Plans
by Kevin Morris
20100216_paved Paved with Good Intentions
Replacing Judgement with Process
by Kevin Morris
20100209_karlmarx Graphic Composition
by Dick Selwood
20100202_altera Changes in the Wind
Altera Shows 28nm Plans
by Kevin Morris
20100126_fending Fending Off Evil
Protecting Your FPGA Against DPA
by Kevin Morris
EVENTS & ANNOUNCEMENTS
New Spartan®-6 and Virtex® Evaluation Kits allow you to slash development time by 50% and focus on product differentiation. Buy your kit today and start designing right out of the box!
Techfocus Media is conducting a survey about your overall impressions and rankings of various aspects of Altera and/or Xilinx FPGA design tools. After completing the survey, you can register for our prize drawing to win one of ten $50 gift certificates to Amazon.com.
Click here to complete the survey
FPGA Journal Forum Competition
Win 500 bucks just for being smart!
LEMME AT THEM FORUMS!
(Click here for competition details)
New in the Forums
Tabula Debuts 3D FPGA Architecture
We finally got a look at what perennial startup Tabula is up to, and it's pretty cool (click here). "3D FPGAs" created by their novel "Spacetime" architecture. It'll b...
Posted on 03/02/10 at 7:00 PM
by: kevin
Interesting
I didn't realize the would-be hacker could clearly (and rather easily) distinguish correct guesses from incorrect ones. If the correct guess didn't yield such a consistent and noticeable peak the attacker's job would be much harder. I can see how the FP...
Posted on 03/02/10 at 12:49 PM
by: ICarlson
In-person demo of DPA attack on FPGA
Since there was a good deal of skepticism on this thread about whether FPGAs are actually vulnerable to DPA attacks (and because I'm a little bit of an engineering geek) I decided to use that as an excuse for visiting Cryptography Research labs to see for...
Posted on 03/01/10 at 9:35 PM
by: kevin
Coverage as a Percentage is not the answer
I think you're asking the following question, "What percentage score should I get on code coverage for optimum quality?" I don't think this formulation of the question gets to the right answer.
I'd ask the question a different way: "What do I have to ...
Posted on 02/23/10 at 7:49 PM
by: raysalemi
PCB/FPGA Integration
Daniel Platzker and Paolo Spazzini told us about getting from pinout to layout in this article (click here)
What do you think? How do you handle the FPGA-to-PCB cha...
Posted on 02/23/10 at 6:48 PM
by: kevin
simulation coverage not product quality
Quality is always paramount; I don't think anyone would disagree with that. The question I'm posing is how can one deliver quality as fast as possible in regards to simulation coverage? I understand this can be situation and person dependent, which is w...
Posted on 02/23/10 at 6:32 PM
by: ICarlson
Xilinx 28nm plans
Xilinx announced their plans for 28nm FPGAs. How do they compare with Altera's? Check out our feature article (click here).
What do you think?
Posted on 02/23/10 at 5:40 PM
by: kevin
From the Editor
kevin_small.jpg
This is an exciting week as we have yet another long-awaited FPGA player making their first public disclosures. Tabula - long in stealth mode, has just announced a radical new architecture called "Spacetime" for their upcoming 3D FPGA families. What's a 3D FPGA and what does "Spacetime" mean? You'll have to read our latest feature, of course.
Also new this week - we had a lot of skepticism about our previous article (click here) on the viability of differential power analysis (DPA) attacks on FPGA security. We decided to visit the labs of Cryptography Research, Inc. to see the process for ourselves. We documented our observations in Journal Forums (click here).
You may have noticed a reward for the best, most insightful forum posts. We're giving another away for the best posts in March, so get started posting.
Kevin Morris, Editor
FPGA Journal
FaceBook_32x32.png Twitter_32x32.png Feed_32x32.png
On Demand
Lowering The Total Cost of Ownership for Industrial Applications (WHITE PAPER)
Approximately one-third of embedded designers surveyed on the adoption and use of FPGAs for embedded applications responded that they perceived FPGAs as too expensive to use in their designs. However, a look at the total cost of ownership (TCO) at the system level (as measured by development, enhancement, replacement, and maintenance costs over the lifetime of the product) reveals that Altera FPGAs offer competitive and flexible alternatives to discrete MCU/DSP/ASSP products. (Altera)
Support Multiple Industrial Ethernet Protocols With a Single FPGA (VIDEO)
Need to support multiple Industrial Ethernet protocols in your factory or process automation system? This 10-minute video features three demos integrating motor control and Industrial Ethernet into a single FPGA. You'll learn how you can easily change protocols on the same FPGA platform and add any Industrial Ethernet communication to existing industrial equipment. (Altera)
Intelligent Digital Power Management (WHITE PAPER)
Today’s complex system designs require capable and efficient power management to enable the advanced features customers demand. Intelligent power management is essential in fulfilling green initiatives and minimizing power consumption. Actel offers an intelligent digital power management (IDPM) solution that provides high-level power management in a low-power, configurable, single-chip design. (Actel)
Accelerating System Designs Requiring High-Bandwidth Connectivity with Targeted Reference Designs (WHITE PAPER)
FPGAs that provide multi-gigabit serial transceivers to implement high-speed serial protocols have become the platform of choice for a large and growing number of applications today. The flexibility to accommodate different protocols, line rates, and emerging standards has made the multi-gigabit serial transceiver the perfect companion to the flexible reprogrammable logic in FPGAs. However, this flexibility comes at a cost. Designing systems that incorporate high-speed serial I/O is difficult enough. Designing systems that work with multiple protocols and different line rates is even more challenging. (Xilinx)
Simplifying Embedded Hardware and Software Development with Targeted Reference Designs (WHITE PAPER)
FPGAs are becoming the platform of choice for a growing number of hardware and software designers developing embedded processing applications for the industrial, medical, communications, aerospace, and defense markets. The combined value of design flexibility to support changing standards, reduced cost due to better system integration, and parallel processing performance has steadily fueled this trend of implementing complete systems on FPGAs. (Xilinx)
Simplifying Multi-Rail Power Management for FPGA designers (CHALK TALK)
Designing a multi-rail power subsystem? Make it easy, and protect expensive ICs, such as FPGAs. Complex designs call for powerful and sophisticated solutions without compromising ease and speed of design. Join Amelia Dalton as she talks with Dave Clemens of Linear Technology about how you can easily set up all-in-one supervising, sequencing, controlling and monitoring of multiple power supplies. (Linear Technology)
Lowering Total System Power Using Xilinx FPGAs (CHALK TALK)
In this webcast, Chalk Talk host Amelia Dalton talks with Jameel Hussein of Xilinx about optimizing system-level power with FPGAs, and features and tools that simplify low-power design with Xilinx FPGAs. (Xilinx)
Platform Management Using MachXO & ProcessorPM PLDs (Webcast)
PLDs are commonly used in platform management applications for housekeeping and power-up management. In this webcast, we discuss the requirements of PLDs in this scenario and look at some of the advantages of the MachXO and ProcessorPM devices from Lattice. We will also examine some of the convenient tools that Lattice provides for quick evaluation and experimentation of the MachXO and ProcessorPM PLDs. (Lattice)
Pushing The Envelope in FPGA Design Using PlanAhead (CHALK TALK)
Want to have the best FPGA designs on the block? You have to push the technology to stay competitive. Join Amelia Dalton as she talks with Greg Daughtry of Xilinx in this Chalk Talk about pushing the envelope in FPGA design. (Xilinx)
Latest News
March 02, 2010
Actel Releases Comprehensive Development Environment and Ecosystem for SmartFusion Intelligent Mixed Signal FPGAs
Actel Introduces SmartFusion Devices -- FPGAs with ARM Cortex-M3 Processor and Programmable Analog
Xilinx Expands Market-Leading Automotive Silicon Portfolio With Spartan-6 FPGAs Optimized to Reduce System Cost
I2C Battery Gas Gauges for Single Li-Ion Cells Offers 1% Accuracy
Xilinx and Inova Semiconductors Simplify Design Integration of High-Bandwidth Video Connections for Automotive Applications
March 01, 2010
Real-Time Filter Design System
February 26, 2010
Eutecus, Inc Releases New Video Analytics Module – the Bi-i V401X, with all analytics embedded in a single low-cost FPGA – and Evaluation and Development Environment also announced at Embedded World 2010
STMicroelectronics Introduces SPEAr® Microprocessors for Embedded-Control Applications
February 25, 2010
European SystemC User Group (ESCUG) Meeting DATE 2010
Lattice Inaugurates Asia Operations Center In Singapore
February 24, 2010
Dual Positive/Negative ±20VIN ±150mA LDO Offers 20µVRMS Noise
Current Feature Articles
The Spacetime Continuum
Tabula Explains 3D FPGAs
by Kevin Morris
Don't try to understand how Tabula's 3D FPGA fabric works. You don't need to know that. All you have to do is wait until they announce a family based on the new technology, and then you can buy bigger, faster FPGAs for less money. And, yes, you can keep using your standard HDL-based FPGA design methodology.
That's it.
We're done.
You can stop reading now.
Why are you still here? Do you think we're going to explain what "spacetime" means, and how an FPGA could possibly be 3D? Are you expecting to hear about logic cells being resource-shared and time-multiplexed at super-high frequencies, creating a virtual logic fabric with up to eight times the density of the physical silicon?
Nah. Read More
20100223_cards Cards on the Table
Xilinx Announces 28nm Plans
by Kevin Morris
20100216_paved Paved with Good Intentions
Replacing Judgement with Process
by Kevin Morris
20100209_karlmarx Graphic Composition
by Dick Selwood
20100202_altera Changes in the Wind
Altera Shows 28nm Plans
by Kevin Morris
20100126_fending Fending Off Evil
Protecting Your FPGA Against DPA
by Kevin Morris
EVENTS & ANNOUNCEMENTS
New Spartan®-6 and Virtex® Evaluation Kits allow you to slash development time by 50% and focus on product differentiation. Buy your kit today and start designing right out of the box!
Techfocus Media is conducting a survey about your overall impressions and rankings of various aspects of Altera and/or Xilinx FPGA design tools. After completing the survey, you can register for our prize drawing to win one of ten $50 gift certificates to Amazon.com.
Click here to complete the survey
FPGA Journal Forum Competition
Win 500 bucks just for being smart!
LEMME AT THEM FORUMS!
(Click here for competition details)
New in the Forums
Tabula Debuts 3D FPGA Architecture
We finally got a look at what perennial startup Tabula is up to, and it's pretty cool (click here). "3D FPGAs" created by their novel "Spacetime" architecture. It'll b...
Posted on 03/02/10 at 7:00 PM
by: kevin
Interesting
I didn't realize the would-be hacker could clearly (and rather easily) distinguish correct guesses from incorrect ones. If the correct guess didn't yield such a consistent and noticeable peak the attacker's job would be much harder. I can see how the FP...
Posted on 03/02/10 at 12:49 PM
by: ICarlson
In-person demo of DPA attack on FPGA
Since there was a good deal of skepticism on this thread about whether FPGAs are actually vulnerable to DPA attacks (and because I'm a little bit of an engineering geek) I decided to use that as an excuse for visiting Cryptography Research labs to see for...
Posted on 03/01/10 at 9:35 PM
by: kevin
Coverage as a Percentage is not the answer
I think you're asking the following question, "What percentage score should I get on code coverage for optimum quality?" I don't think this formulation of the question gets to the right answer.
I'd ask the question a different way: "What do I have to ...
Posted on 02/23/10 at 7:49 PM
by: raysalemi
PCB/FPGA Integration
Daniel Platzker and Paolo Spazzini told us about getting from pinout to layout in this article (click here)
What do you think? How do you handle the FPGA-to-PCB cha...
Posted on 02/23/10 at 6:48 PM
by: kevin
simulation coverage not product quality
Quality is always paramount; I don't think anyone would disagree with that. The question I'm posing is how can one deliver quality as fast as possible in regards to simulation coverage? I understand this can be situation and person dependent, which is w...
Posted on 02/23/10 at 6:32 PM
by: ICarlson
Xilinx 28nm plans
Xilinx announced their plans for 28nm FPGAs. How do they compare with Altera's? Check out our feature article (click here).
What do you think?
Posted on 02/23/10 at 5:40 PM
by: kevin
Labels: view its intresting
posted by navn @ 4:40 AM
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